Semiconductor devices are manufactured by depositing many different types of material layers over a semiconductor workpiece or wafer, and patterning the various material layers using lithography. The material layers typically comprise thin films of conductive, semiconductive and insulating materials that are patterned to form integrated circuits using lithography.
Semiconductor lithography involves placing a patterned mask between a semiconductor workpiece, and using an energy source to expose portions of a resist deposited on the workpiece, transferring the mask pattern to the resist. The resist is then developed during which either the exposed or unexposed regions of the resist are removed. The removal of exposed or unexposed regions depends whether the resist is positive or negative tone. The resist is then used as a mask while regions of a material corresponding to areas opened during resist development on the workpiece are etched.
In many designs, the individual features of an integrated circuit, such as gate lines or signal lines, as examples, have extremely small dimensions and may have widths of about 0.2 to 0.4 μm or less, with their lengths being considerably greater, about 0.8 to 2.0 μm or greater, for example. These thin lines may be intended for connection to other layers of the integrated circuit by narrow vias filled with conductive material. It is important in semiconductor designs that each layer is aligned properly to adjacent material layers to ensure electrical connection, and that the dimensions of patterned features are being correctly printed on the various material layers. The size integrity of critical dimensions (CD) may be compromised because of various processing and/or optical effects, for example. In particular, the accuracy of forming and positioning conductive lines and vias of an integrated circuit becomes increasingly critical as dimensions decrease. Relatively minor errors in positioning such features can cause a via to miss a conductive line altogether, or to contact the line over a surface area that is insufficient to provide the necessary conductivity for a fully functional circuit.
Optical measurements are used in semiconductor technology to measure a variety of parameters of semiconductor devices. The measurements may be used for critical dimension measurement, line shortening measurements, and alignment and overlay measurements, as examples. Gratings are often used as a target for measurement in semiconductor lithography. The gratings typically comprise a line and space pattern. For example, a row of gratings is typically used in scatterometry to measure CD.
Scatterometry involves measuring order diffraction responses of a grating at multiple wavelengths, as described in a paper entitled “Specular Spectroscopic Scatterometry in DUV Lithography” by Xinhui Niu et al., Proc. SPIE 1999, Vol. 3677, pp. 159-168, which is incorporated herein by reference. As described in the paper, scatterometry is a library-based methodology for CD profile extraction. Measurements of the gratings are compared to those stored in a library, e.g., in a look-up table, and any variations from the library data indicate the amount that the CD is too large or too small, for example.
However, many optical measurements require targets having dimensions that exceed the design rule limitations. For example, lithography of extremely long and thin patterns may be limited by the wavelength and photoresist used to pattern the target. One requirement, particularly in scatterometry, is to manufacture targets comprising line and space pairs that are sufficiently large for measurement by an optical measurement tool.
What are needed in the art are improved targets or test structures for optical measurements of semiconductor devices, wherein the targets have features that have dimensions within the design rule limitations of the semiconductor devices.